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Features: Programmable clock, Data alignment and programmable digital test pattern generation
Shutdown: No Shutdown
Gain Error: 1.3 % FSR
Input Type: Differential
Resolution: 14 bit
Output Type: CMOS or LVDS
Architecture: Pipeline
Sampling Rate: 125 MS/s
Interface Type: SPI
Mounting Style: SMD/SMT
Reference Type: External, Internal
Development Kit: No
Power Consumption: 106 mW
Reference Voltage: 1 V
Number of Channels: 2 Channel
Number of Converters: 2 Converter
Analog Supply Voltage: 1.8 V
Digital Supply Voltage: 1.8 V
FPBW - Full Power Bandwidth: 650 MHz
INL - Integral Nonlinearity: 1 LSB
SNR - Signal to Noise Ratio: 74.5 dB
Maximum Operating Temperature: + 85 C
Minimum Operating Temperature: - 40 C
DNL - Differential Nonlinearity: 0.5 LSB
ENOB - Effective Number of Bits: 11.4 bit
THD - Total Harmonic Distortion: - 84 dBc
SFDR - Spurious Free Dynamic Range: 91 dBc
SINAD - Signal to Noise and Distortion Ratio: 70.3 dBFS
